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[FIRRTL] Add layer block support to AddSeqMemPorts #7599

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Update the AddSeqMemPorts pass to support layers. Namely, this will now allow for input ports to be added to memories declared under layer block. If a user tries to add output ports, then produce an error.

Generally, this entire pass likely doesn't make sense for layer blocks at all. I.e., this pass is entirely about adding MBIST ports to memories. Memories that are declared under layerblocks are likely only for verification use and adding MBIST ports to these doesn't really make sense. Nonetheless, it is reasonable to have this pass do something sane if it encounters a user request like this.

This made a small change to the pass output where the connects created are placed immediately following the memory instance. This is necessary to create the connects inside the layer blocks. However, it is also slightly better output than before. (This changed one test superficially.)

Update the AddSeqMemPorts pass to support layers.  Namely, this will now
allow for input ports to be added to memories declared under layer block.
If a user tries to add output ports, then produce an error.

Generally, this entire pass likely doesn't make sense for layer blocks at
all.  I.e., this pass is entirely about adding MBIST ports to memories.
Memories that are declared under layerblocks are likely only for
verification use and adding MBIST ports to these doesn't really make
sense.  Nonetheless, it is reasonable to have this pass do something sane
if it encounters a user request like this.

This made a small change to the pass output where the connects created are
placed immediately following the memory instance.  This is necessary to
create the connects inside the layer blocks.  However, it is also slightly
better output than before.  (This changed one test superficially.)

Signed-off-by: Schuyler Eldridge <[email protected]>
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This does not handle some of the weirder things that could be going on here related to the memory metadata file. This file is intended to show where these extra ports are on which memory. However, the memory may be moved under a layer block bind file.

It may be better to instead completely disallow this pass for memories under layer blocks. It just really doesn't make sense to be adding MBIST ports to memories which are basically design verification collateral. Alternative way of arguing this, because layers are new, nobody is using this behavior, thereby we can punt on what to do here until there is an actual user.

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